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Recently ARM announced the availability of Cortex-M0, most likely the smallest 32-bit core on the market. Now NXP announced availability of a first Silicon implementation of the Cortex-M0 to be showcased at the ESC in San Jose. There is some information from ARM about the M0 in a Cortex-M0 Flyer.
Intriguing is the data about the very low power. Depending on the leakage of a process used, such a Cortex-M0 core could provide significant improvement for battery operated applications. Now that we have existing silicon from NXP, numbers are quite impressive. The impressive numbers cover two areas, power consumption and price! M0 is not primarily targeted to compete in the existing 32-bit market but rather in the upper end of the 8-bit and right down the center aisle of the 16-bit market. It expands 32-bit coverage further down in price range and power modes. Users that consider using higher end 8-bit MCUs should also consider low end 32-bit MCUs, especially for new designs. Starting with a Cortex-M0 offers great flexibility for future upgrades, whether that is to a Cortex-M3 or a Cortex-R4 does not really matter. Upgrading will be easy. The performance is to be expected very close to existing ARM7 devices running in Thumb mode. That is between 20-30% less performance compared to full featured Thumb2 running at the same clock speed. If a certain performance is required, a M0 based device needs to be clocked 20-30% faster than the Cortex-M3 based device.This is not just the core but the whole microcontroller including memory and peripherals. There goes some of the power savings IF you need the performance too! Replacing an 8-bit, you will still have plenty of extra performance and the low power. Other key players in the Cortex-Mx market such as Luminary with the LM3 line of products and ST Microelectronics with their STM32 line of products, both with offerings using the Cortex-M3. Both companies seem somewhat reluctant to jump yet on another core / spend the money for another license. The difference in die size between a Cortex-M3 and a Cortex-M0 when using a 180nm or smaller process is less than 1% of the overall die size for a typical microcontroller, thus having minimal impact on cost.The major cost advantage is not so much in the silicon but it is in the lower licensing cost for the Cortex-M0. Smaller and upcoming semiconductor companies with great ideas can probably afford an M0 well before they can afford to license an M3. In the past, implementation of power saving mechanisms have resulted in vastly different values for current consumption, between different MCUs, using the same Cortex-M3 core. This means that the core itself, whether it is a Cortex-M0 or a Cortex-M3 is only secondary in regards to overall power consumption. A first class M3-implementation with a low leakage process will almost certainly beat a M0-implementation using a process that has not been optimized for low leakage. Only time will tell whether the announcement of the Cortex-M0 was closer to the work of a genius or closer to a flop. One statement seems certain, the Cortex-M family of cores with the new software standard CMSIS will be a very significant player in the 32-bit microcontroller world. Summary: Let's face it, the Cortex-M0 will be a very low power machine as long as the most appropriate manufacturing processes are used and the application does not demand a certain performance. Once you run a M0 at 50 MHz, you might be better off with a Cortex-M3 running at 40 MHz, delivering about the same performance. More information in Cortex-M3 and Cortex-M0 in training 1 day Rapid Gain Training from Doulos for Cortex-M0, Cortex-M1 and Cortex-M3. Check back on this site, we will post a schedule for training in the US after the ESC as soon as they are comfirmed. 4 day in depth Cortex-M Training There is one coming up early June in Silicon Valley |