ARM introduces the Cortex-M4 MCU core

The Cortex-M4 processor extends the use of Cortex-Mx cores to applications that require more computational performance than available currently with Cortex-M3. The leading companies for the Cortex-M3 already signed up for the upgrade to Cortex-M4. With the big three in Cortex-M namely TI, NXP and ST, ARM was able to get the main competitors on board early on! That is a major achievement as semiconductor companies are usually a little reluctant to commit to new IP, that has not been on the market in silicon. In the past ARM often used smaller lead customers to evangelize the industry. Launching Cortex-M4 with ST, NXP and TI in the client list all but guarantees success. 

The Cortex-M4 has been designed for use in motor control, automotive, power management, embedded audio, and industrial automation markets, ARM said. The Cortex-M4 features a single-cycle multiply-accumulate (MAC) unit, optimized single instruction multiple data (SIMD) instructions, saturating arithmetic instructions and an optional single precision Floating-Point Unit (FPU). The 32-bit processor core is capable of 1.25-DMIPS/MHz for Thumb-2 instructions.

So, the Cortex-M4 is a Cortex-M3 with the DSP instruction add-ons that have been introduced in the past to improve the ARM9 when the core went from the ARMv4 architecture to the ARMv5 architecture. The floating point is optional because it adds almost 40% to the gate counts which is twice as many gates as the whole Cortex-M0 (12k) uses. It is going to be interesting which company hits the market first with Cortex-M4 and which ones will add the FPU. Just having the DSP extensions will give the performance a boost. 

The original press release says:" For a target clock frequency of 150-MHz ARM physical IP for the GlobalFoundries' 65LPe 65-nm process enables a standard implementation of the Cortex-M4 processor within 65,000 gates and a dynamic power consumption of less than 40-microwatts/MHz. The FPU, if included, adds only 25,000 gates said ARM."

Such low power consumption of the Cortex-M4 core can result in device power consumption similar to low power 8-bit while the performance is that of a mid range 32-bit. Imagine a system running at 50 MHz with 62 DMIPS and only consuming 2 mAs. While such numbers might not happen right now, they establish a very nice base line. In a typical MCU the power consumption for the core is just one contributor in the total power consumption. The lower the base line, the more can be achieved in the overall system by clock-gating peripherals.